/* Copyright (c) 2025 Beijing Semidrive Technology Corporation
 * SPDX-License-Identifier: Apache-2.0
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 * http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

/**
 * @file  SpiSlave_Types.h
 * @brief Semidrive. AUTOSAR 4.3.1 MCAL SpiSlave_Slave plugins.
 */

#ifndef SPI_SLV_TYPES_H
#define SPI_SLV_TYPES_H

#ifdef __cplusplus
extern "C" {
#endif

/*******************************************************************************
**                     Include Section                                        **
*******************************************************************************/

/* Included for pre-compile options */
#include "SpiSlave_Cfg.h"

/* AUTOSAR standard types */
#include "Std_Types.h"
#include "SpiSlave_Cbk.h"


/* Type of application data buffer elements. */
typedef uint8 SpiSlave_DataBufferType;

/* Type for defining the number of data elements of the type SpiSlave_DataBufferType to send and / or receive by Channel */
typedef uint16 SpiSlave_NumberOfDataType;

/* Definition of type for channel ID */
typedef uint8 SpiSlave_ChannelType;

/* Specifies the identification (ID) for a Job. */
typedef uint16 SpiSlave_JobType;

/* Specifies the identification (ID) for a sequence of jobs. */
typedef uint8 SpiSlave_SequenceType;

/* Specifies the identification (ID) for a SPI Hardware microcontroller peripheral (unit). */
typedef uint8 SpiSlave_HWUnitType;

typedef uint8 SpiSlave_PinModeType;

/* Definition of status type */
typedef enum  {
    SPI_SLV_UNINIT = 0U,
    SPI_SLV_IDLE = 1U,
    SPI_SLV_BUSY = 2U
} SpiSlave_StatusType;


/* Definition of Job Result type */
typedef enum  {
    SPI_SLV_JOB_OK = 0U,
    SPI_SLV_JOB_PENDING,
    SPI_SLV_JOB_FAILED,
    SPI_SLV_JOB_QUEUED
} SpiSlave_JobResultType;

/* Definition of Sequence Result type */
typedef enum  {
    SPI_SLV_SEQ_OK = 0U,
    SPI_SLV_SEQ_PENDING,
    SPI_SLV_SEQ_FAILED,
    SPI_SLV_SEQ_CANCELLED
} SpiSlave_SeqResultType;

/* Definition of type for asynchronous mode */
typedef enum  {
    SPI_SLV_POLLING_MODE = 0U,
    SPI_SLV_INTERRUPT_MODE
} SpiSlave_AsyncModeType;

/* Buffer usage with EB/IB channel. */
typedef enum  {
    SPI_SLV_EB = 0U,
    SPI_SLV_IB
} SpiSlave_ChannelBufferType;
typedef enum {
    SPI_SLV_LSB = 0U,
    SPI_SLV_MSB
} SpiSlave_ChannelTransferType;

/* This parameter defines the SPI data shift edge. */
typedef enum  {
    SPI_SLV_LEADING = 0U,
    SPI_SLV_TRAILING
} SpiSlave_DataShiftEdge;

/*This parameter defines the SPI shift clock idle level. */
typedef enum  {
    SPI_SLV_HIGH=0U,
    SPI_SLV_LOW
} SpiSlave_ShiftClockIdleLevel;

typedef enum {
    SPI_SLV_MASTER = 0U,
    SPI_SLV_SLAVE
} SpiSlave_HwUnitMode;

typedef enum {
    SPI_SLV_ASYNC_MODE = 0U,
    SPI_SLV_SYNC_MODE
} SpiSlave_TransferMode;

/** \brief This parameter defines the SPI parity type. */
typedef enum
{
    SPI_SLV_P_NONE = 0U,
    SPI_SLV_P_ODD,
    SPI_SLV_P_EVEN
} SpiSlave_Parity_t;

typedef struct SpiSlave_ChannelCfgTypeTag {
    /*Buffer usage with EB/IB Channel*/
    SpiSlave_ChannelBufferType ChannelBufferType;
    /* Transmit data width (1 up to 32 bits) */
    uint8 DataWidth;
    /* Number of IB Channels or maximum size of EB Channels*/
    SpiSlave_NumberOfDataType BufferSize;
    /* pointer to channel internal write buffers */
    SpiSlave_DataBufferType *WriteBufferIndex;
    /* pointer to channel internal Read buffers */
    SpiSlave_DataBufferType *ReadBufferIndex;
    /* Transfer start LSB or MSB */
    SpiSlave_ChannelTransferType TransferType;
    /* Default transmit value */
    uint32 DefaultValue;
} SpiSlave_ChannelCfgType;

typedef struct SpiSlave_JobCfgTypeTag {
    /* Data With */
    uint8 DataWidth;
    /* BitOrder Transfer start LSB or MSB */
    SpiSlave_ChannelTransferType BitOrder;
    /* Assigned SPI HW Unit */
    uint8 DeviceIdx;
    /*HwUnitIdxCfg*/
    uint8 HwUnitIdxCfg;
    /* Assigned SPI HW Unit */
    SpiSlave_HWUnitType HWUnit;
    /* Assigned Chip Select pin */
    uint8 CSPin;
    /* Enable Receive functinallity */
    boolean EnableRx;
    /* Chip select pin polarity high or low */
    boolean CSPolarity;
    /* Shift clock idle low or idle high */
    SpiSlave_ShiftClockIdleLevel ShiftClk;
    /* Data shift with leading or trailing edge */
    SpiSlave_DataShiftEdge ShiftEdge;
    /* the parity of transmission */
    SpiSlave_Parity_t parityType;
    /* Priority (4 levels are available from 0, the lower to 3, the higher) */
    uint8 SpiJobPriority;
    /* Pointer to Job finish callback function */
    SpiSlave_JobEndNotifyType JobEndNotification;
    /* is enable LE swao to BE */
    boolean IsLe2Be;
    /* timeout */
    uint8 Transtimout;
    /* SpiBaudRateCheckMax*/
    uint8 SpiBaudRateCheckMax;
    /* SpiBaudRateCheckMin*/
    uint8 SpiBaudRateCheckMin;
    /* MCU dependent properties for the Job (only if needed) */
    /* number if channels in the Job */
    uint8 NoOfChannels;
    /* Link to channel list */
    const SpiSlave_ChannelType *ChannelList;
} SpiSlave_JobCfgType;

typedef struct SpiSlave_SequenceCfgTypeTag {
    /* Interruptable or not interruptable after each Job */
    boolean InterruptableSequence;
    /* Sequence finish end notification function */
    SpiSlave_SeqEndNotifyType SequenceEndNotification;
    /* Number of Jobs */
    uint16 NoOfJobs;
    /* Collection of Jobs */
    const SpiSlave_JobType *JobList;
    /* Seq_HwMask of HwUnit */
    const uint32 SeqHwMask;
} SpiSlave_SequenceCfgType;

typedef struct SpiSlave_ConfigTypeTag {
    /* Definition of Channels */
    const SpiSlave_ChannelCfgType *ChannelType;
    /* Definition of Jobs */
    const SpiSlave_JobCfgType *JobType;
    /* Definition of Sequences */
    const SpiSlave_SequenceCfgType *SequenceType;
} SpiSlave_ConfigType;


typedef enum  {
    B_SLV_UNLOCK = 0,
    B_SLV_LOCKED,
} SpiSlave_BuffLock;

typedef enum  {
    B_SLV_NO_SETED = 0,
    B_SLV_SETED,
} SpiSlave_BuffSetState;

typedef struct {
    /*IB Buf write locker */
    VAR(SpiSlave_BuffLock, SPI_SLV_VAR) BuffLock;
    VAR(SpiSlave_BuffSetState, SPI_SLV_VAR) BuffSta;
} SpiSlave_ChannelStateType;

typedef struct {
    /* the HwUnit is ID or index */
    VAR(SpiSlave_HWUnitType, SPI_SLV_VAR) HwUnit;
    /* HwDma: ture enable or false disable */
    VAR(boolean, SPI_SLV_VAR) HwDMA;
    /* This is the spi controller apb register base */
    VAR(uint32, SPI_SLV_VAR) ctrlRegBase;
} SpiSlave_HwUnitConfigType;


extern P2CONST(SpiSlave_ConfigType, SPI_SLV_VAR, SPI_SLV_APPL_CONST) SpiSlave_pSpiConfigPtr;

#ifdef __cplusplus
}
#endif

#endif /* SPI_SLV_TYPES_H */
/*******************************************************************************
**                          End Of File                                       **
*******************************************************************************/
